Low Voltage Low Power and High Frequency Vco/Ico Design
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Behzad Razavi, A study of phase noise in CMOS oscillators, IEEE J. of Solid state Circuits, vol.31,no.3, March 1996, pp 331– 343.
M Y Yasin, Bal Gopal, High Frequency Oscillator Design Using a Single 45 nm CMOS Current Controlled Current Conveyor (CCCII+)with Minimum Passive Components, Circuits and Systems, 2011, 2, pp 53-59
R. Jacob Baker, “CMOS Circuit Design, Layout, and Simulation” Second Edition, IEEE Press Series on Microelectronic Systems Stuart K. Tewksbury and Joe. E Brewer, Series Editor, Wiley India Pvt. Ltd, Reprint; 2014, PP 339-348.
Changku Hwang et.all., Low voltage low power CMOS VCO, IEICE Trans, Fundamentals, vol. E82-A, no.3, March 1999, pp 424 – 430.
JubayerJalilet.all., Designing a ring VCO for RFID Transponders in 0.18μm CMOS process, Hindawi Publishing Group, The Scientific World Journal, vol.2014, article ID:580385, pp 6(pages), http//dx.doi.org/10.1155/2014/580385.
Behzad Razavi, Analog CMOS VLSI, Tata Mc GrawHill Book Company
J. Millman and Grabel, Microelectronics, 4thEdition,Tata McGrawHill.
Sedra and Smith, Microelectronic Circuits, 5ed, Oxford Press, India,
M. Janaki Rani, Dr. S. Malarkkan, “ Analysis of Pseudo-NMOS Logic with Reduced Static Power in Deep Sub-Micron Regime” Proceedings of The International Conference on Advances in Electronics and Communication Engineering’ 12, pp1-4
Rajeev Kumar, Vimal Kant Pandey, “Low power combinational circuit based on Pseudo NMOS logic” International Journal of Enhanced Research in Science Technology & Engineering,Vol. 3 Issue 3, March-2014, pp: (452-457)
Boylestad, R.L., Electronics Devices and circuit, Tenth edition, Chap-6
Douglas A. Pucknell, Basic VLSI, Third edition, Chap-6.
PTM HP for high-performance design applications is released, covering 45nm or more nodes. PTM HP incorporates latest technology advances, including high-k/metal gate and strained silicon, 9/30/2008.
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