Novelty of diagonal power routing in design of op-amp at nanometre scale

Abstract

This paper focused on routing in VLSI nanometre era to show that the proposed approach has better prospects than the existing approaches. Subject to technological constraints and performance requires cutting a timing at increasing computation speed and decreasing storage space requirements, already most of the designs are existing with the orthogonal power routing approach, but some parameters has to control in specific limits for specified systems of design, here we present a new algorithm for the shortest path connection between one terminal to other in design problem. in this paper the new D'algorithm uses an economical representation and adopts a novel slantwise technique. In this paper proposed a diagonal routing for top metal layers for op-amp design with 24 MOS transistors results with HVT swapping has been incorporated to validated the proposed approach, in addition with this diagonal routing implementation get effect in various parameters such as power, delay and length etc. this proposed approach is meant for specific limitation of application in the area of VLSI design.