Characterization of File Memory Compiler

Abstract

As the usage of hand held devices is increasing rapidly, it is a serious requirement to design the SoC with much smaller size. Majority of the area on the SoC is occupied by the memories used like RAM, Cache etc. It is required to reduce the size of these memories on the SoC. Also as these SoC run on batteries such memories must consume very less power. So the requirement is to design high density embedded memories with less in area, with less power consumption and meeting the designer timing requirements like access time, setup and hold time constraints. The main aim of the proposed work is, once the design is done, the memory compiler need to be characterized whether it is meeting the design requirements for the given instance and given process, voltage and temperature corners and to get the memory timing and power information in datasheet and liberty formats.