Data Encryption and Decryption Using Triple AES on FPGA

Asha. P, Dr.G.V. Jayaramaiah


Securing the digital data is of utmost important for digitisation. There are many encryption and decryption algorithms enabling such digital data security. However there still is a scope for improvising on the existing algorithm and to develop new algorithms. Triple Advance Encryption System (TAES) is one of the algorithms aiming for increased security of digital data. Intent of this paper is to elaborate on the key features, design and advantages of Triple Advance Encryption System (TAES) which varies from AES by using two different cipher keys for encryption.

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Advanced Encryption Standard (AES), Nov. 26, 2001.

A. J. Elbirt, W. Yip, B. Chetwynd, and C. Paar. An FPGA implementation /and performance evaluation of the AES block cipher candidate algorithm finalist. presented at Proc. 3rd AES Conf. (AES3)

V. Fischer and M. Drutarovsky, “Two methods of Rijndael implementation in reconfigurable hardware,” in Proc. CHES 2001, Paris, France, May 2001, pp. 77–92.

K. Gaj and P. Chodowiec. Comparison of the hardware performance ofthe AES candidates using reconfigurable hardware. presented at Proc.3rd AES Conf.(AES3). [Online].Available:

H.Kuo and I.Verbauwhede, “Architectural optimization for a 1.82 Gbits/sec VLSI implementation of the AES Rijndael algorithm,” in Proc. CHES 2001, Paris, France, May 2001, pp.51–64.

A. Satoh, S. Morioka, K. Takano, and S. Munetoh, “A compact Rijndael hardware architecture with S-Box optimization,” in Proc. ASIACRYPT2001, Gold Coast, Australia, Dec. 2000, pp. 239–254.

A. Rudra, P. K. Dubey, C. S. Jutla, V. Kumar,J.R. Rao, and P. Rohatgi,“Efficient implementation of Rijndael encryption with composite field arithmetic,” in Proc. CHES 2001, Paris, France, May 2001, pp. 171–184.

G. P. Saggese, A. Mazzeo, N.Mazocca, and A.G.M. Strollo,“An FPGA based performance analysis of the unrolling, tiling and pipelining of the AES algorithm,” in Proc. FPL 2003, Portugal, Sept. 2003.

X. Zhang and K. K.Parhi,“Implementation approaches for the advanced encryption standard algorithm,” IEEE Circuits Syst. Mag., vol. 2, no. 4,pp. 24–46, 2002.


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