Wallace Tree Multiplier Design and Simulation with DNA Logic Gates

Abstract

The DNA molecule is indubitably the most powerful medium known to code, store information as a means of data storage but till now, DNA molecule has found little use in computing applications. For initiating computing application with DNA molecule, it requires to design DNA transistors which can be utilized to design basic gates to implement Boolean logic. Interestingly, some recent researches have shown that it is very much possible to design a three terminal transistor like device architecture by controlling the flow of RNA polymerase along DNA with specific integrases as inputs. Such approach also initiated successful experimental design and realization of various basic Boolean logic Gates with DNA molecule. Present work theoretically adopted, modified and extended such DNA logic gate concept to execute design simulation of a 4*4 bit Wallace Tree Multiplier circuit. The timing diagram for input and product output has been successfully simulated which authenticate that such DNA logic gate concept can be extended to complex circuits also. The bit error rate and delay factor calculation have been done for the simulated circuit and approximate area analysis has been done. Present simulation model is designed with digital modeling approach in MATLAB Simulink with detail design methodology which will be a valuable step forward towards developing circuit simulator to simulate, analyze and fabricate bio-electronic circuits in near future.