VHDL MODELING OF PAYLOAD DATA STORAGE AND DATA PROCESSING BLOCK OF WI-FI MAC LAYER FOR TRANSMITTER.

Aarti Sinha

Abstract


For the wi-fi conversation, IEEE 802.eleven is one of the protocols to be had. The IEEE 802.11b uses the medium get right of entry to control layer (MAC) for wi-fi neighborhood region community. these wi-fi neighborhood place networks use carrier sense more than one get admission to with collision avoidance (CSMA/CS) for the MAC layer .however most effective the MAC layer for transmitter is taken into consideration here for simulation. So, the wireless transmitter module is divided into five blocks i.e. information Unit Interface block, Controller block, Pay Load data storage, MAC Header register block and records Processing block. in this paper we recollect only the simulation of MAC header sign in blocks. So, other blocks i.e. facts unit interface block, Controller block, pay load records garage block & information Processing block are not discussed similarly on this paper. A subject programmable gate array (FPGA) device has been used because the hardware implementation platform. The proposed MAC-layerhardware is carried out with Xilinx xcv300e Virtex E FPGA.


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References


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