Impact of Doping concentration and gate voltages on Simulation of n-FinFET

Abstract

Here we are using a double gate FinFET and with the help of this device we are able to overcome the drawback of the MOSFET. In MOSFET we have a higher drain induced barrier lowering (DIBL). And because of short channel effects (SCE) the gate of the device loses its control over the channel. It also had higher threshold voltage. In this paper, firstly, we are implementing a 32nm gate length FinFET. And the software we are using is visual TCAD. Here in this paper, we had reported the impact of doping on 32nm gate length FinFET with fin width 22nm. The Id current, i.e. drain current increases when the donor ion concentration of source/drain regions increases from 1x1016 cm-3 to 7x1020 cm-3. Whereas we observed that there is a decrease in drain current when the acceptor ion concentration in the channel increases to 7x1020 cm-3. Secondly, we observed the impact of gate voltage on the device. Finally, Id-Vd comparison graph of varying gate length from 32nm gate length to 20nm gate length at the same parameters (i.e. 32nm, 28nm, 22nm, 20nm) are reported.